Improving cell efficiency and reducing costs: applying experiences in microelectronics

Published: February 1, 2010

By Kris Baert, R&D Project Manager, IMEC; Jozef Poortmans, Program Director, IMEC

The PV industry is expected to eventually reduce its manufacturing costs well below €1/Wp. Major technological changes lie ahead of us for manufacturing wafers, solar cells and modules if this cost target is to be met. In order to focus R&D efforts amongst the myriad options, and to speed up the learning curve, the PV industry (equipment vendors, material suppliers and PV manufacturers) may benefit from collaborative efforts guided by an ITRS-like roadmap. In this paper we present the IMEC roadmap, the target of which is to reduce drastically the amount of pure Si needed per Wp by combining efficiencies beyond 20% with aggressive reductions in wafer thicknesses.

Single Paper

Includes one paper digital access
US$ 21

Photovoltaics International SubscriptionDigital & Archive

Includes 12 months of unlimited digital access to the Photovoltaics International content, full online archive, technical paper collection (over 700), and more.

Includes 2 upcoming issues in digital.

US$ 449 per year

This Website Uses Cookies

By continuing browsing this website you are accepting our Cookie Policy, as well as our Terms of Use and Privacy Policy.